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关键词:
Logic Synthesis and Verification Algorithms
书目信息
ISBN:
9780387310046(13位)
中图分类号:
TB
杜威分类号:
中文译名:
逻辑综合及确认算法
作者:
Gary D. Hachtel; Fabio Somenzi
编者:
语种:
English
出版信息
出版社:
Springer
出版地:
出版年:
2006
版本:
版本类型:
原版
丛书题名:
卷期:
文献信息
关键词:
Engineering
前言:
摘要:
内容简介:
<P>Logic Synthesis and Verification Algorithms blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application to design. Through the study of optimal two-level and multilevel combinational circuit design, the reader is introduced to basic concepts, such as Boolean algebras, local search, and algebraic factorization.</P> <P>Similarly, through the study of optimal sequential circuit design, the reader is introduced to graph algorithms, finite state systems, and language theory. Throughout the book, recurrent themes such as branch and bound, dynamic programming, and symbolic implicit enumeration are used to establish optimal design principles.</P> <P>Circuit designers and CAD tool developers alike will find Logic Synthesis and Verification Algorithms useful as an introductory and reference text. The rich collection of examples and solved problems make this book ideal for self study.</P> <P>Because of its careful balance of theory and application, Logic Synthesis and Verification Algorithms will serve well as a textbook for upper division and first year graduate students in electrical and computer engineering.</P>
目次:
附录:
全文链接:
读者对象:
Grad. textbook
实体信息
页码:
600
装帧:
Soft
尺寸:
其它形态细节:
其它信息
原价:
EUR
54.9500
原版ISBN:
其它ISBN:
图书特色:
书评:
扩展信息
Isbn:
0387310045
issue:
2006JC02
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